Abstract
Circuit partitioning plays an important role in physical design automation of very large scale integration (VLSI) chips. The interest in finding an optimal partitioning especially in VLSI has been a hot issue in recent years. In VLSI circuit partitioning, the problem of obtaining a minimum cut is of prime importance. To enhance, other criterion like power, delay and area in addition to minimum cut is included. Memetic Algorithm (MA) is an evolutionary algorithm that includes one or more local search phases within its evolutionary cycle. MA applies some sort of local search for optimization of VLSI partitioning. The algorithm combines a hierarchical design technique, Genetic algorithm and constructive techniques like Simulated Annealing for local search to solve VLSI partitioning problem. MA quickly produces optimal solution for the entire popular benchmark problem. The result will be compared with the previous work result
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