Abstract

Encoder circuits are vital component of an electronic computer system. Encoders are generally used for the conversion of a 2 bit number into the n bit number. Applications of encoders can be visualized as keyboard encoder on widespread use. Design of an optimized encoder circuit with the concept of reversible logic is the main outcome of this research paper. The concept of reversible logic has become burgeoning tool for the designing of efficient digital circuits with low power dissipation. This paper provides a possible approaches to design a decimal to BCD encoder using reversible logic gates. Optimization of the circuit has been explored on the basis of minimization of some performance parameters such as number of reversible logic gates used in the designing, garbage outputs generated during the operation of the circuit and quantum cost of the circuit.

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