Abstract
We propose a new ALU circuit based on reversible logic. The ALU circuit implements two addition methodologies. The outputs are generated at some fixed lines for each arithmetic or logic function. A satisfactory tradeoff is achieved between the line count and the quantum cost. Reduction in ancillary inputs and garbage outputs causes a decrease in fabrication cost. The proposed designs outperform the earlier designs with respect to delay, line count and number of operations. The libraries NOT–CNOT–V–[Formula: see text] are used to optimize the quantum cost of the proposed designs.
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