Abstract

We developed a novel electrical non-return-to-zero (NRZ) to return-to-zero (RZ) converter circuit based on a master-slave D-type flip-flop (D-FF). Its decision and re-timing function makes the converter without any delay or phase control circuitry, which are usually employed to adjust the phase alignment of data and clock. The circuit achieved 50-Gbit/s operation by using 0.13 /spl mu/m gate-length InP HEMT technology. The supply voltage was -5.2 V and the power consumption was 1.1W. A module with the circuit mounted realized 44-Gbit/s operation.

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