Abstract
PAPER on current memory circuit design (see Item 1 under References), which is published in IEEE TRANSACTIONS ON ELECTRON DEVICES, has drawn our attention. In this paper, a technique used to suppress the influence of charge injection in switched-current (SI) memory circuits, with an improvement in speed without relying on the matching of device characteristics, has been reported. The objective of this present note is to bring the attention of Lin and Shieh and the readers that the same technique with an identical circuit for an SI memory cell was published much earlier by Wang et al. in March 2000 (see Item 2 under References).
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