A Non-Feedback -Σ Modulator for Digital-to-Analog Conversion Using Digital Frequency Modulation

Abstract

This paper describes a novel noise-shaping Δ-Σ modulator for D/A-conversion which has no global feedback. The proposed topology is well suited for a pipelined clocking scheme allowing increased oversampling ratios for both first and higher order modulators. The maximum clock-frequency of the new modulator is limited only by the delay through one single accumulator regardless of modulator order, which represents a huge saving compared to the conventional modulator. The converter is very modular and scales easily to higher modulator orders. Still the proposed topology is mathematically equivalent to the classical Δ-Σ modulator. Theoretical analysis and circuit simulations for a first- and second-order modulator are presented. The first-order circuit has been implemented in a FPGA-circuit from Altera and measured results are presented.