Abstract

In this paper, we present a noise, power, and area efficient biosensing front-end application specified integrated circuit (ASIC) for the next-generation wireless body sensor nodes and implantable devices. We identify the key design parameter tradeoffs in the biomedical recording systems and carry out a thorough analysis and optimization to maximize them. Based on our analysis and optimization of the front end, we propose a design methodology for the recording channel that is applicable to various biomedical applications. The ASIC is implemented in a 0.18- $\mu \text{m}$ CMOS process to validate our optimization methodology. The ASIC is reconfigurable to accommodate various biopotentials with the high-pass and low-pass cutoff frequencies being 0.5–300 Hz and 150 Hz–10 kHz, respectively. The low-pass cutoff is provided by an ultralow power $G_{m}$ - ${C}$ low-pass filter, which also acts as an antialiasing filter for the switching-optimized 10-b successive approximation register (SAR) analog-to-digital converter (ADC). The analog front end (AFE) gain is also programmable from 38 to 72 dB. A comprehensive power management unit provides the power supply, multiple reference voltages, and bias currents to the entire chip. The AFE and ADC dissipate only $5.74~\mu \text{W}$ and 306 nW from the on-chip regulators, respectively. The measured input-referred noise is $2.98~\mu \text{V}_{{\text {rms}}}$ , resulting in the noise efficiency factor and power efficiency factor equals 2.6 and 9.46, respectively. The active area of the AFE is 0.0228 mm2. We verify the chip functionality in a number of in vivo and ex vivo biological experiments.

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