A new wide dynamic range fixed point ADC for FPAs

Abstract

CMOS image sensor system has several clear advantages over CCD image sensor system: selective readout, low power, small size, high frame rate, on-chip functionality, and low cost. However CCD image system still dominates over digital camera market, because the CMOS image system has a poor dynamic range (DR) and peak signal-to-noise ratio (SNR). In this paper, we propose a new enhanced DR and peak SNR CMOS image sensor with pixel level analog-to-digital converter (ADC). The proposed reset technique increases the well capacity of the imager. Consequently, DR and peak SNR are increased simultaneously while other DR enhancement schemes increase only DR. We designed and simulated the proposed circuit and achieved 12bit resolution with 1000frames/sec. Power consumption per each pixel is 50nW. DR is enhanced by 36dB and peak SNR is enhanced by 18dB.