Abstract
Human face detection in image sequence plays a crucial role in the applications such as video surveillance, security monitoring, human computer communication, smart homes, autonomous robots, and medical image analysis. Human recognition is based on identification and locating a human face in images or image sequence in spite of background, size, position, and lighting stipulation. The state-of-the-art face detection algorithms make use of skin tone filter to enhance the performance of human face detection and recognition algorithms. In this paper, a new parallel hardware architecture for skin tone detection has been proposed, where meanCr, meanCb, etc. are computed concurrently. Hence, the proposed architecture achieves high throughput compared to the DSP implementation of the same. The proposed architecture has been implemented and validated using Xilinx Spartan 3E XC3S500E FPGA chip. The implementation also occupies only 40.19% device area. The critical path delay in FPGA implementation is only 11.5 ms.
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