Abstract
The Multilevel inverters are known for their high power capability and reliability. They produce the output in the form of staircase waveform. If the number of level increases then almost perfect sine wave can be attained at the output. The increase in number of levels improves the power quality but it also increases the complexity in control and cost, which will increase the switching losses also. Hence there is a need for research in the multilevel inverter topology to have reduced number of switches for increased levels than the conventional and pre-proposed topologies. The purpose of this paper is to design the new topology on multilevel inverter with reduced switching devices
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