A New Testing Method for Hardware Trojan Detection

Abstract

Abstract This paper presents a partitioning approach to improve the Trojan detection process. The proposed transition probability based method tries to partition combinational circuits for pseudo exhaustive testing. The nodes of digital circuit in which the transition probability is less than predefined threshold mark as the potential point for hardware Trojan insertion. Thus, our objective is new circuit partitioning method to increase the transition probability of the potential points. We propose I-PIFAN partitioning algorithm in which the optimal size of primary input cone (N) and Fan-out (F) values are selected to partition a given combinational circuit. The partitioning method determines the optimal values of N and F to increase the transition probability and minimize 1) the number of test vector, 2) the number of partitions and 3) the critical path delay. This work ensures that all nodes with low transition probability pass the threshold after partitioning. The proposed algorithm reduces the test time of digital combinational circuits and improves Trojan detection quality. The partitioning method is applied to the ISCAS’85 benchmark circuits and the simulation results show the test vectors reduction and improvement of transition probabilities.