A new technique to accurately determine latch-up holding conditions using light excitation

Abstract

A simple and accurate method to determine the true CMOS latch-up holding current and voltage by avoiding the "quasi-stable" negative resistance region is reported. A combination of microscope light excitation and a low-output impedance programmable power supply permits millivolt resolution, eliminates the need for a series current limiting resistor, and allows automatic testing. Results from test structures fabricated with n-well CMOS process are used to illustrate the method. With the terminal voltage during the excitation only 20-100 mV above the holding voltage, the method is practically nondestructive and therefore especially suitable for characterization of structures with high latch-up currents.