A new technique for high IIP2 reconfigurable CMOS mixer in multi-standard receivers

Abstract

A new technique for addressing the challenging dynamic range required by CMOS multi-standard Zero-IF GSM and UMTS receivers is presented in this paper. This is achieved by LC tuning of the parasitic capacitors of mixer switching transistors in different frequency bands with an easily reconfigured new integrated variable inductor. Using this technique, a high IIP2 low noise mixer supporting DCS, PCS, UMTS and IEEE802.11 b-g standards is designed. The mixer achieves IIP2 higher than 70dBm while the input refereed noise performance is 5 and 3.5nv/sqrt(Hz) in DCS/PCS and UMTS respectively. The design is done in 65nm CMOS technology.