A new Surface Accumulation Layer Transistor (SALTran) concept for current gain enhancement in bipolar transistors

Abstract

In this paper we report a new Surface Accumulation Layer Transistor (SALTran) on SOI which uses the concept of surface accumulation of electrons near the emitter contact to significantly improve the current gain. Using two-dimensional device simulation, the performance of the proposed device has been evaluated in detail by comparing its characteristics with those of the previously published conventional lateral bipolar transistor (LBT) structure. From our simulation results it is observed that the proposed SALTran exhibits a high current gain of approximately 190 as compared to the conventional transistor which shows a current gain of only 30. We also demonstrate that the presence of the surface accumulation layer does not deteriorate the cut-off frequency as observed in the high-low emitter junction bipolar transistors. We have discussed the reasons for the improved performance of the SALTran including the complete fabrication procedure as implemented in the two-dimensional process simulator.