Abstract
Based on the concept of switched-capacitor based multilevel inverter topology, a new structure for a boost multilevel inverter topology has been recommended in this paper. The proposed topology uses 11 unidirectional switches with a single switched capacitor unit to synthesize nine-level output voltage waveform. Apart from the twice voltage gain, self-voltage balancing of capacitor voltage without any auxiliary method along with reduced voltage stress has been the main advantages of this topology. The merits of proposed topology have been analyzed through various comparison parameters including component counts, voltage stresses, cost and efficiency with a maximum value of 98.3%, together with the integration of switched capacitors into the topology following recent development. Phase disposition pulse width modulation (PD-PWM) technique and nearest level control PWM (NLC-PWM) have been used for the control of switches. Different simulation and hardware results with different operating conditions are included in the paper to demonstrate the performance of the proposed topology.
Highlights
With the rapid growth of the renewable energy resources and its application in high voltage applications link industrial drive, high voltage dc transmission (HVDC), electric vehicle (EV), etc., power electronic converters play an important role in the power conversion suitable for each application
With the input voltage of 200V, the peak of the output voltage has a value of 400V, which verifies the twice voltage gain of the proposed topology
A new multilevel inverter topology has been proposed in this paper
Summary
With the rapid growth of the renewable energy resources and its application in high voltage applications link industrial drive, high voltage dc transmission (HVDC), electric vehicle (EV), etc., power electronic converters play an important role in the power conversion suitable for each application. A topology with two dc-link capacitors and one floating capacitor has been proposed in [25] It utilizes 10 switches for seven-level generations, the voltage gain has been limited to a value of 1.5. Similar to [26], a hybrid switched-capacitor based topology has been proposed in [28] without boosting the input voltage. Another topology with a voltage gain of 1.5 has been proposed in [29] which has a higher switch count for the seven-level output voltage. Fourth Voltage State (Vo = 2Vdc): During this voltage state, the input dc source voltage is added to the voltage of the switched capacitor This results in a voltage level equal to twice the input voltage.
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