Abstract
A new set of linear constraints for designing broad-band time domain element space antenna array processors is presented. The set of linear constraints is used to ensure that a desired look-direction response of the processor over a frequency band of interest can be closely approximated. The design technique is posed in such a way that three types of presteering can be handled: no presteering, coarse presteering, and exact presteering. The elimination of presteering time delays or the possibility to use coarse presteering is an attractive feature in a digital implementation of antenna array processors. The relationship that the new processor has to other broad-band processors is also established. Furthermore, the approach enables various types of errors and mismatches between signal model and actual scenario to be incorporated in the problem formulation.
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