Abstract
A new routing algorithm is proposed for FPGA to improve the increasing transformation cost of pseudo-Boolean Satisfiability algorithm in the routing process. The approach combines advantages of pseudo-Boolean Satisfiability and geometric routing algorithm. First, Frontier-one of geometric routing algorithm is chosen for FPGA routing. Then pseudo-Boolean Satisfiability algorithm is used when the process of Frontier is not successful. Technique of static symmetry-breaking is also adding to carry out pretreatment of pseudo-Boolean constraints, detecting and breaking the symmetries in the routing flow. The advantage is that the search path is pruned, and the cost is consequently reduced. Preliminary experiments results show that the hybrid method have no adverse affect on overall program. It has also reduced the runtime observably, and sped up the solving process.
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