Abstract
AbstractOne of the instabilities in plastic‐encapsulated MOS LSI is due to leakage caused by parasitic MOS formation. This paper uses this parasitic MOS leakage phenomenon to evaluate the surface reliability of new MOS. In this investigation the center of the gate electrode is omitted, and an MOS transistor with a partial gate structure is fabricated; plastic encapsulations are used, and the source‐drain leakage current variation with time is investigated with a voltage applied between source and drain. The results are shown to be different with different plastic encapsulation. The maximum leakage current increase rate is denoted by α. The parameter α is temperature‐dependent and a linear relationship exists between the logarithm of α and the reciprocal of the absolute temperature T. The activation energy is found to be 1.1∼1.4 eV. The theoretical formula of the physical meaning of α shows that α is proportional to the diffusion constant of the parasitic MOS formation, and the correctness of the new evaluation method using α is confirmed. Our method has good repeatability. In addition, it permits an easier and, because of high sensitivity, a faster evaluation than the conventional method using variations of the threshold voltage VT.
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More From: Electronics and Communications in Japan (Part I: Communications)
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