Abstract
A novel reading scheme for the multitime programmable (MTP) memory cells is presented in this paper. The proposed scheme performs reading operation on the control transistor, and the cell's threshold voltage is defined relative to the tunneling gate. The new scheme obtains the threshold voltage window of 6.8 times as much as does the conventional reading scheme, with the same program/erase operations. In addition, the cell's reading current and transconductance can be tuned conveniently by changing the W/L ratio of the control transistor. Furthermore, the proposed reading scheme can also improve the cell's endurance and data retention. Theoretical deduction and extensive simulation results are provided.
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