A New Nine-Level Highly Efficient Boost Inverter for Transformerless Grid-Connected PV Application

Abstract

Transformerless grid-connected multi-level <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">PV</i> (photovoltaic) inverter has the major concern of leakage current and buck behavior of output voltage, hence not suitable for low voltage PV applications. A new <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">9L4x</i> (nine-level quad boost) highly efficient inverter based on the <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">SC</i> (switched capacitor) with a <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CG</i> (common ground) configuration has been proposed in this paper, which provides four times the gain of input voltage. Hence, this inverter is preferable for low voltage <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">PV</i> applications without any boost dc/dc converter intermediate stage. The inverter is designed in such a way that total conducting switches for different level generation is minimum. This technique helps to increase the efficiency of the inverter. Two <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">SC</i> cells are utilized to step-up the input <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">PV</i> voltage and facilitate nine steps in output voltage. The common grounding feature of the proposed inverter topology helps mitigate the leakage current. Additionally, this new inverter can handle reactive power during the grid’s lagging/leading pf (power factor) condition. To regulate the active and reactive grid power, a <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">PR</i> (proportional resonant) controller is designed. The proposed modulation strategy balances the voltages of switched capacitors at their base voltage with allowable ripple. The inverter circuit details, control strategy, <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">PWM</i> (pulse width modulation) scheme, thermal modeling, and loss analysis with component design guidelines are described in detail. Experimental results are presented to validate the effectiveness and feasibility of this proposed inverter.