Abstract
Negative bias temperature instability (NBTI) is one of the major reliability concerns for analog and digital MOS devices. NBTI understanding and modeling is receiving a growing interest for failure prediction, depending on the temperature and duty cycle of dynamic-stress conditions. In this framework, we present a new NBTI model based on hole trapping and thermally activated relaxation. The model unifies previous concepts of hole tunneling/trapping and structural relaxation initiated by hole trapping. Simulation results can account for the time and temperature dependence of NBTI stress, NBTI recovery, and the dependence on thickness and nitridation technology of the gate dielectric. The numerical model may be used for physics-based reliability predictions of NBTI effects as a function of time, temperature, and stress regime.
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