A new nanoscale fin field effect transistor with embedded intrinsic region for high temperature applications

Abstract

The present paper reveals a novel structure of nanoscale Silicon-On-Insulator (SOI) Fin Field Effect Transistor (FinFET) in which an intrinsic region (EIR) is embedded into the buried oxide layer. The key idea in this work is to improve the critical thermal problems raised by the self-heating effect (SHE). The EIR-FinFET device has lower thermal resistance, reduced hot carrier effect, lower threshold voltage roll-off, and lower critical electric field in comparison with the C-FinFET. Also, higher DC transconductance, lower DC conductance and a better gate capacitance are obtained because the intrinsic region is embedded in a suitable place. Moreover, the simulation result with three-dimensional and two-carrier device simulator demonstrates an improved output characteristic of the proposed structure due to the reduced self-heating effect. The intrinsic silicon layer is located under the source and fin regions and provides more space to dissipate the accumulated heat. Due to the high thermal conductivity of the silicon and decreasing corner effects there, the heat will flow easily and the lattice temperature will decrease. All the extracted results attempt to show the superiority of the EIR-FinFET device over the conventional one, and its effect on the operation of nanoscale low power and high speed devices.