Abstract

A new method is proposed for the formation of Ge nanowires in a gate-all-around integration scheme. We combine the use of GeSn:P/Ge epitaxial stacks and low-temperature Cl2 vapor-phase etching to demonstrate a high etch selectivity of GeSn:P versus Ge. The process can be combined with an insitu passivation of the Ge nanowires, which can bring several advantages in view of improved process reliability and control.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.