A New Method of Determining the Thermal Resistance of Microelectronic Packages

Abstract

A critical literature review on the determination of thermal resistance in a package is presented. Finite element simulation of three types of packages, namely, Leadless Chip Carrier (LCC), Bump Chip Carrier (BCC) and Plastic Ball Grid Array (PBGA) as representative of the packages used in the electronic industry, is carried out both at package level and board level separately. Based on the results obtained from 204 simulations, a new methodology of determining the junction temperature even in cases where the specification of the board is not known a priori is developed. The prediction of the junction temperature from the new methodology agrees well with the results of the package and the board simulated simultaneously. The junction temperature obtained by simulation agrees well with experimental data or literature value. A methodology is presented to transform the results for a JEDEC standard board to a non-JEDEC standard board. The coefficient of performance of a non-JEDEC standard board has been introduced and evaluated. The effect of junction temperature in a given package on the reliability has been investigated. Some cases where components failed due to temperature effect are presented.