Abstract
For high-speed digital circuit design, signal integrity(SI) and power integrity(PI) issues have gradually become two non-ignorable factors. Independent SI analysis and PI analysis have produced abundant research results, but the problems caused by them simultaneously, such as the simulation of synchronous switching noise(SSN), are still an urgent problem to be solved. In order to solve the SSN problem as much as possible in the simulation analysis stage, an accurate and general SI-PI co-simulation analysis method is necessary. In this paper, a novel SI-PI simulation analysis method using the spice model of power distribution network(PDN) is proposed. This method can be applied to almost all Printed Circuit Board(PCB) simulation analysis with certain accuracy. In order to verify the reliability of this method, we conduct a comparative experiment on an LPDDR4 system and fit the actual test results. Furthermore, an optimized example of a PDN is presented to illustrate the effectiveness of this approach.
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