Abstract
One of the challenges of low power methodologies for digital systems is saving power consumption in these systems without compromising performance. In this paper we propose a new method for estimating dynamic power consumption in combinational circuits. The method enables us to optimize the power consumption of typical combinational circuits.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
