A new method for correcting time and soft errors in combinational circuits

Abstract

In this paper a simple method for fault tolerance with respect to transient or soft errors in the combinational part of sequential circuits is investigated. The memory elements of the sequential circuits are fault-tolerant master-slave-flip-flops. For correcting errors in the combinational part instead of error-correcting codes (ECCs) much simpler error-detecting codes can be used. An error detection signal indicating an error in a combinational part of the circuit blocks the clock signal in the second half of the clock cycle with the result that the previous correct state values of all the slave latches are preserved as long as the transient error (of any duration) stays in the combinational circuit. As soon as the transient error disappears, the system can continue to work from a correct state immediately; no complicated restart of the system is necessary. The system has only to stop for the duration of the transient error. The necessary time delay of the error signal determined by the error-detecting code limits the length of the clock cycle for which the proposed method is applicable. Therefore simple error-detecting codes such as parity codes, split-parity codes and duplication codes should be used. For the mentioned codes the time delay and the error detection probabilities which correspond to the error correction probabilities of this method are determined for benchmark circuits experimentally.