Abstract
Once there are constant or infrequently changed bits (COIBs) in two adjacent input messages of SHA-2, the switching power of input messages data registers (IMD-REGs) used for COIBs will disappear. Meanwhile, when full pipeline SHA-2 is applied in a certain application scenario where the IMD-REGs used for COIBs can be removed, more area of full pipeline SHA-2 can be saved as the proportion of IMD-REGs in message word registers increases. This paper proposes a new message expansion structure for full pipeline SHA-2 to increase the proportion of IMD-REGs. By inserting two expanders in last part of expansion structure pipeline stages and rescheduling the expander, the consumption rate of input messages will be decreased and the proportion of IMD-REGs will be increased. Compared with normal message expansion structure, the ratio of IMD-REGs to total message word registers in the proposed structure is increased from 15.1% to 41.6% for full pipeline SHA256, and 11.2% to 32.4% for full pipeline SHA512. When COIBs exists in adjacent input messages, the power and area advantages of proposed new message expansion structure have been demonstrated by FPGA and ASIC implementations.
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