A New Low Complexity Bit-truncation Based Motion Estimation and Its Efficient VLSI Architecture

Abstract

A new motion estimation method and its hardware implementation are presented in this paper. In this method, all the frames are firstly gray coded. After that, the two most significant bits from the current frame and reference frame are used to compute the motion vector. Besides, a diamond search algorithm is used in place of the full-search algorithm. The motion estimation scheme proposed in the present paper is also verified to work on various standard video sequences. The experimental results thus obtained show that the proposed algorithm has an excellent balance of performance and computational complexity. External memory access has been reduced drastically by incorporating search pixel reuse. The resulting architecture is simple in terms of the hardware cost and power requirements while being faster than a recently reported similar architecture. The proposed architecture requires less hardware than comparable systems without compromising performance. The proposed architecture is therefore suited to be used in portable consumer electronic devices with real-time video applications in which power consumption is a concern.