Abstract

The Level-1 barrel trigger of the ATLAS experiment is based on the resistive plate chambers (RPCs) detectors. The on-detector trigger electronics identifies muons with specific values of transverse momentum, by using coincidences between different layers of detectors. Trigger data are then transferred from on-detector to off-detector trigger electronics boards. Data are processed by a complex system, which combines trigger data from the barrel and the end-cap regions and provide the combined muon candidate to the central trigger processor (CTP). The system has been performing well for almost a decade. However, in order to cope with continuously increasing large hadron collider luminosity and more demanding requirements on trigger efficiency and performance, various upgrades for the full-trigger system were already deployed and others are foreseen in the next years. Most of the trigger upgrades are based on the state-of-the-art technologies and allow designing more complex trigger menus, increasing processing power and data transfer bandwidth in order to send more trigger candidates, to perform topological selections, and to support new physics studies. In this paper, we describe the design of the first prototype of the barrel interface board, designed around a Xilinx field-programmable gate array, which transfers RPC trigger data to the CTP system; the board supports the optical transmission of trigger data with fixed latency and new trigger algorithms. We discuss the design strategies, the hardware implementation, and the results of the first functional and integration tests.

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