A new instability phenomenon in microcrystalline silicon thin film transistors

Abstract

Instability of a bottom gate microcrystalline silicon (μc-Si) thin film transistor (TFT) was studied, of which the active layer was deposited by VHF–PECVD with Silane concentration (SC) of 3% diluted by H2. Stability of the μc-Si TFT under two different gate-bias stress conditions was measured and compared. A new instability phenomenon of TFT under the gate-bias stress of Vg=Vds=10V was found; the ratio of the source-drain current to its initial value decreases first, then stays flat for a period of time, then increases. Analysis on the change of sub-threshold swing (S) and threshold voltage (Vth) with stress time indicated the recoverable degradation could have resulted from the electron trapping and releasing effect in μc-Si TFT treated by gate-bias stress with a Vd≠0.