Abstract
The discrete wavelet transform (DWT) and the embedded block coding with optimized truncation (EBCOT) account for most of the workload in JPEG2000 encoding. This paper presents a new hardware & software co-design that improves the JPEG2000 encoder's performance while keeping its flexibility by replacing the DWT and the EBCOT with hardware accelerators. In order to further improve the performance, the DWT and the EBCOT are integrated with each other to achieve more efficient parallelism of the JPEG2000 coprocessor. The experiment was done on the Altera Stratix II FPGA development board. The experimental results show that this approach can achieve 72% reduction in total encoding time by replacing the two software modules with hardware modules. Considering the code flow between the DWT and EBCOT and integrating them, this approach can achieve extra 16% saving.
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