Abstract
Hydrogenated amorphous-silicon (a-Si:H) thin-film transistors (TFTs) in the bottom-gate back-channel-cut geometry were made with a homogeneous SiO2-silicone hybrid as the gate dielectric. The dielectric is deposited in a plasma-enhanced chemical vapor deposition (PE-CVD) system at nominal room temperature, and the a-Si:H channel and n+ source/drain layers are deposited by PE-CVD at 150degC. The threshold voltage VT is ~3V, the subthreshold slope is S ~ 290 mV/decade, the electron field-effect mobility is mu~1.5 cm2/Vldrs, and the on/off current ratio is ~107. The threshold-voltage shift DeltaVT under high-field gate bias is approximately one-half of that in conventional a-Si:H/SiNx TFTs fabricated at 300degC . These results suggest that the SiO2-silicone hybrid material may become the gate dielectric of choice for a-Si:H TFT applications that require high transconductance and high stability.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.