Abstract
This paper introduces a new method for manually generating test programs to validate a processor design. Current manual methods do not utilize high level of abstraction for describing test programs and lack many important features like reusability, incremental validation, and test program compaction; they also work on a formal model specifically developed for validation purposes. To solve the above problems, we use test specification expressions to describe test programs and generate test sequences based on an instruction-set description of a processor written for synthesis purposes. We provide experimental results of generating test programs for several processors to show the effectiveness of our method.
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