Abstract
A four-level metal interconnect strategy designed specifically for an advanced 0.5-/spl mu/m BiCMOS technology is described. Unique features of the new technology include: (a) the use of a nonetchback spin on polymer, hydrogen silsesquioxane (HSQ), for planarization and for lower capacitance of the interlayer dielectric, (b) low-temperature polycrystalline silicon planarization by HSQ, (c) a thick fourth layer of metal for high quality spiral inductors, (d) a low cost chemical vapor tungsten deposition followed by sputtered hot aluminum for greater process simplicity and reliability by eliminating the tungsten etchback step, and (e) a preventive high refractive index, silicon-rich glass for device protection from the interconnect processes.
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