A new erasing method for a single-voltage long-endurance flash memory

Abstract

A new method to erase a standard (double-poly, stacked-gate NOR-type) flash cell is proposed. The method, still using the tunneling mechanism to extract electrons from the floating gate, is based on the concept of keeping the electric field constant during the whole erasing operation. The new method has two main advantages with respect to the conventional one: (1) it does not depend on the supply voltage variation and (2) it allows a better reliability in terms of endurance-induced stress. Results have shown that flash device performances are greatly improved in terms of stability and endurance reliability up to one million cycles.