Abstract

A new design technique employing CMOS Current Feedback Operational Amplifier (CFOA) is presented. This design approach applies CFA OTA as input stage cascaded with class AB cross-coupled buffer stage. The performance parameters of CMOS CFOA such as bandwidth, slew rate, settling time are extensively improved compared with conventional CFOA. These parameters are very important in high frequency applications that use CMOS CFOA as an active building block such as A/D converters, and active filters. Also the DC input offset voltage and harmonic distortion (HD) are very low values compared with the conventional CMOS CFOA are obtained. P-Spice simulation results using 0.35 μm MI-ETEC CMOS process parameters shows considerable improvement over existing CMOS CFOA simulated model. Some of the performance parameters for example are DC gain of 67.2 dB, open-loop gain bandwidth product of 104 MHz, slew rate (SR+) of +91.3 V/μS, THD of -67 dB and DC input offset voltage of -0.2 mV.

Highlights

  • The role of analog integrated circuits in modem electronic systems remains important, even though digital circuits dominate the market for VLSI solutions

  • This paper describes an alternative approach to CMOS Current Feedback Operational Amplifier (CFOA) design which provides symmetrical high impedances inputs together with high performance parameters in high frequency operation

  • The proposed design based on cross-coupled buffer stage that connected as output stage of the CMOS CFOA

Read more

Summary

Introduction

The role of analog integrated circuits in modem electronic systems remains important, even though digital circuits dominate the market for VLSI solutions. The CFOAs offset is higher than folded cascade voltage amplifier (VFA) Design. The CFOA could be realized by using second generation current conveyor CCII+ cascaded with a voltage follower [13]. This paper describes an alternative approach to CMOS CFOA design which provides symmetrical high impedances (infinite for DC) inputs together with high performance parameters in high frequency operation. This design approach applies CFA OTA as input stage cascaded with class AB cross-coupled buffer as output stage. The symmetrical input stage of CFA OTA will reduce the DC offset voltage of CMOS CFOA with improvement of high frequency parameters.

Theoretical Background of CFB OTA
Proposed of CMOS CFOA
Simulation Results
Conclusion
Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call