A New Current-Sweep Method for Assessing the Mixed-Mode Damage Spectrum of SiGe HBTs

Abstract

We present a new ldquocurrent-sweeprdquo stress methodology for quantitatively assessing the mixed-mode reliability (simultaneous application of high current and high voltage) of advanced silicon-germanium (SiGe) HBTs. This electrical-stress methodology allows one to quickly obtain the complete ldquodamage spectrumrdquo of a given device from a particular technology platform, enabling better understanding of the complex voltage, current, and temperature interdependence associated with electrical stress and burn-in of advanced transistors. We consistently observe three distinct regions of mixed-mode damage in SiGe HBTs and find that hot-carrier-induced damage can be introduced into SiGe HBTs under surprisingly modest mixed-mode-stress conditions. For more aggressively scaled technology generations, a larger percentage of hot carriers generated in the collector-base junction are able to travel to and hence damage the emitter-base (EB) spacer, leading to enhanced forward-mode base-current leakage under stress. A new self-heating-induced mixed-mode-annealing effect is observed for the first time under specific high-voltage- and high-current-stress conditions, and a new damage mechanism is observed under very high-voltage and high-current conditions. Finally, as an example of the utility of our stress methodology, we quantify the composite mixed-mode damage spectrum of a commercial third-generation (200 GHz) SiGe HBT. We find that if devices are stressed with either voltage or current alone during burn-in, they can easily withstand extreme overstress conditions. Unfortunately, devices can easily be damaged when stressed with a combination of stress voltage and current, and this has significant implications for the lifetime prediction under realistic mixed-signal-circuit operating conditions.