Abstract
Based on the basic device physics of the neuron-bipolar junction transistor (/spl nu/BJT), a new compact cellular neural network (CNN) structure called the /spl nu/BJT CNN is proposed and analyzed. In the /spl nu/BJT CNN, both /spl nu/BJT and lambda bipolar transistor realized by parasitic p-n-p BJTs in the CMOS process are used to implement the neuron whereas the coupling MOS resistors are used to realize the symmetric synapse weights among various neurons. Thus it has the advantages of small chip area and high integration capability. Moreover, the proposed symmetric /spl nu/BJT CNN can be easily designed to achieve large neighborhood without extra interconnection. By adding a metal-layer optical window to the /spl nu/BJT, the /spl nu/BJT can be served as the phototransistor, and the /spl nu/BJT CNN can receive optical images as initial state inputs or external inputs. The correct functions of the /spl nu/BJT CNNs in noise removal, hole filling, and erosion have been successfully verified in HSPICE simulation. An experimental chip containing a 32/spl times/32 /spl nu/BJT CNN and a 16 /spl times/16 /spl nu/BJT CNN with phototransistor design, has been designed and fabricated in 0.6-/spl mu/m single-poly triple-metal n-well CMOS technology. The fabricated chips have the cell state transition time of 0.8 /spl mu/s and the static power consumption of 60 /spl mu/W/cell. The area density can be as high as 1270 cells/mm/sup 2/. The measurement results have also confirmed the correct functions of the proposed /spl nu/BJT CNNs.
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