A New Class of Single Event Soft Errors

Abstract

A new class of single event transient errors, referred to here as "single event disturb errors", is described. These errors are potentially as troublesome as single event upsets. Computer simulations demonstrate that disturb errors have critical charges less than or equal to those for logic upset in all circuits, and rates approaching those for upset in state-of-the-art sRAM circuits with polysilicon resistor loads. The errors cannot be prevented by resistive decoupling, and elude many current single event error testing methods.