Abstract

The Application Space Architecture (ASA) defines parallel processor design as an adjunct to the Instruction Set Architectures (ISA) defined by Von Neumann for single processors. Before addressing hardware, one must understand applications requiring parallel processors, and software approaches required to meet speed constraints. Parallel processor applications use a single task to run N (number-of-processors) times faster than could be done on a single processor, where Processor Utilization Efficiency (PUE) is the ratio of single processor time to parallel processor time divided by N. Such applications require processing to be split into independent elements running in parallel on a large number of processors. This requires that processors do not sit idle (current PUEs are typically 2-10%.) This sets the requirement for “independent” elements to communicate with each other without stopping. In special cases, clusters of PCs are used to perform parametric analyses running many copies of a simulation on separate computers, typically using different random numbers. Except for initial and terminal processes, these separate simulations hardly communicate while running. Thus they are easily divided into separate tasks that typically exchange information between computers passing data or messages through a top level management task. Such applications (e.g., LINPACK) are labeled “embarrassingly parallel”.

Highlights

  • Hennessy and Patterson describe the need for an equivalent single processor Instruction Set Architecture (ISA) for parallel processors, [1]

  • Hennessy and Patterson spelled out the need to rethink the ISA currently used for hardware designs and create a new approach for parallel processor designs

  • One must start with an understanding of the underlying differences in applications that require parallel processing speeds to meet their time constraints versus those that can run on a single processor or cluster

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Summary

INTRODUCTION

Hennessy and Patterson describe the need for an equivalent single processor Instruction Set Architecture (ISA) for parallel processors, [1]. This requires more than a special hardware instruction set such as that for servers processing multiple independent tasks on multiple processors, see [2], [3] Those working many parallel processor applications know that, they appear different, they all share critical properties. This implies substantial independence of the operators This led to the underlying property of independence as defined mathematically, and by Kalman for designing real-time control systems, [5]. This led to the concept of software architectures that could be created using independent modules.

THE PROPERTY OF INDEPENDENCE
MEASURES OF COMPUTERS AND SOFTWARE
THE SEPARATION PRINCIPLE
SOFTWARE ARCHITECTURE
TIME SYNCHRONIZATION AND SPEED
HARDWARE DESIGN CHANGES
CONCLUSION
ARTICLES BY INDUSTRY LEADERS ON PARALLEL PROCESSING
EE TIMES
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