A New Approach to Multiple Soft Fault Diagnosis of Analog BJT and CMOS Circuits

Abstract

This paper deals with multiple soft fault diagnosis of nonlinear analog circuits and offers a method that allows locating the faulty parameters and evaluating their values. The method works with a system of nonlinear algebraic test equations, which are not given in explicit analytical form, and actually may possess multiple solutions. The solutions are specified by one or several sets of the diagnostic parameter values that meet the test. To find the multiple solutions, an extended systematic search method has been developed. The diagnostic algorithm proposed in this paper exploits this method and brings a new concept for finding the actual solution. As a result, the diagnostic process is considerably improved. It can be applied to bipolar junction transistor and CMOS circuits manufactured in micrometer and nanometer technologies. In the last case, however, the transistors are characterized by intricate models (PSP 103 or BSIM 4). In consequence, the CPU time increases due to very complex sensitivity analyses of the circuits required by the diagnostic method. In such a case, the proposed approach is useful at the preproduction stage, where the CPU time is offline and not crucial. For illustration, two numerical examples are given.