A new approach for critical area estimation in VLSI

Abstract

Calculation of the critical area is the main computational problem in the estimation of the yield of a VLSI layout. For efficient critical area calculations, a real defect related to photolithography is usually modeled as a circular disc for which only the diameter of the disc is used. The actual critical area of a real defect, however, is determined by its fluctuant directional extensions and should be the average over all the critical areas corresponding to those directional extensions. The available simple defect outline models may cause large errors in the critical area estimations. This paper presents a new approach for critical area estimation. This new approach consists of two integrated parts: a new theoretical framework for critical area evaluation where actual defect extensions can be estimated by a function rather than a constant, and a new defect outline model for estimating the directional extensions of a real defect based on the idea of piecewise linear interpolation. The new theoretical framework and the new defect outline model can be used to estimate the critical area in a more accurate way as shown in this paper.