Abstract
This paper describes one method of implementing a GPS C/A code digital receiver. Digital designs promise exceptionally low-power, low-cost, and miniaturized receivers in the near future. This has been made possible through recent advances in digital signal processing and very large scale integration (VLSI) techniques. The receiver described here attempts to minimize analog circuitry, which is difficult to integrate, and maximize the use of digital signal processing hardware and techniques. The digital signal processing has been carried out with a combination of standard integrated circuits and a commercially available digital signal processor. The signal processor is used to control digital code- and carrier-tracking loops via numerically controlled oscillators (NCOs). Hardware and software implementations of these and other receiver functions, including correlation, 50 baud data extraction, and pseudoranging, are described in detail. All receiver software and hardware was designed and developed using a desk-top computer as the host development system.
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