Abstract
A 1.25- mu m CMOS VLSI device that converts the popular 1.544-Mb/s T1 format used in digital telecommunications to a 4.096-Mb/s system format is described. The transmit and receive functions are implemented with a RAM, a 3088-bit shift register, and 33 K transistors.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
