Abstract
Memristive crossbar arrays can be used to realize matrix-vector multiplication (MVM) operations in constant time complexity by exploiting the Kirchhoff’s circuit laws. This is enabled by the parallel read of the entire array in a single time step. However, parallel writing is prohibitive in such arrays due to limitations on the current that could be accumulated along the wires. Hence, loading the matrix elements into such an array still incurs significant time penalty. Another key challenge is the achievable computational precision. To overcome these challenges, we propose a unit-cell array design where each unit-cell comprises four memristive devices each attached to a selection transistor. Moreover, the array is organized in such a way that the selection transistors can be turned on in a diagonal fashion. We experimentally demonstrated this concept by fabricating a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2\times 2$ </tex-math></inline-formula> unit-cell array based on projected phase-change memory (PCM) devices in 90 nm CMOS technology. It is shown that using the diagonal connections, the write operations can be parallelized while maintaining the current limit of the back-end-of-the-line metallization. Moreover, the increase in write time due to having more devices per unit-cell is minimized through a combination of single-shot and iterative programming schemes. Finally, we present experimental results on MVM operations that demonstrate improved computational precision exceeding that of a 4-bit fixed-point implementation.
Highlights
In-memory computing (IMC) is an emerging paradigm where certain low-level computational tasks are executed within a memory array using the physical attributes of the memory devices and their array-level organization [1], [2]
Memristive devices [3] storing the matrix elements in terms of their conductance values when organized in a crossbar configuration can perform matrix-vector multiplication (MVM) operations in constant time complexity by exploiting the Kirchhoff’s circuit laws
The unit-cells are programmed to various combinations of 5-bit conductance states, such that given defined input vectors, the ideal MVM results would cover the full output range
Summary
In-memory computing (IMC) is an emerging paradigm where certain low-level computational tasks are executed within a memory array using the physical attributes of the memory devices and their array-level organization [1], [2]. Memristive devices [3] storing the matrix elements in terms of their conductance values when organized in a crossbar configuration can perform matrix-vector multiplication (MVM) operations in constant time complexity by exploiting the Kirchhoff’s circuit laws This makes IMC very attractive for applications such as deep neural network (DNN) inference [4], [5] (see Fig. 1). Achieving at least O ( )-complexity for carrying out programming operations on memristive crossbars is desirable to accelerate the import of pre-trained weights for DNN inference [4] and is essential to enable applications such as DNN training [9]–[11] Another key challenge associated with MVM using IMC is the lack of precision [12]. The design is experimentally validated using a 2 × 2 array-protoype based on PCM devices fabricated in 90 nm CMOS technology
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