Abstract
AbstractThis paper presents a novel methodology for the design of the Space Vector (SV) switching sequences in order to reduce the output voltage distortion and the common‐mode voltage (CMV) without increasing the number of commutations in comparison to conventional and optimised techniques presented in the literature. Three spaces can be distinguished in a converter, referring to: line‐to‐line voltages, phase voltages and switching states. Consequently, three correspondent sequences of vectors in each space can be verified. The output voltage distortion, CMV and switching count are mainly affected, respectively, by the sequences in the line‐to‐line voltage, phase voltage and switching state spaces. However, the three spaces are interdependent, and the selection of a sequence in one space affects the ones in the other spaces. As a consequence, this paper presents a novel SV approach, where the line‐to‐line voltage sequences are selected over a fundamental period horizon considering the impact in the phase voltages through an algebraic analysis, assuring minimal phase voltage transitions while using VIKOR method to choose the best trade‐off between reduction of output voltage distortion and CMV. In order to validate the proposed strategy, experimental results are given to a three‐phase five‐level Packed U‐Cell (PUC5) converter.
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