Abstract
This work presents a multi-channel TDC designed on a KINTEX-7 FPGA and which is used during the development phase of a new RICH photodetection system in view of a future LHCb upgrade. This TDC-in-FPGA core achieves a 150 ps bin width while keeping a low resource usage. It is capable of measuring time-over-threshold (ToT) and time-of-arrival (ToA) at a rate above 50 MHz. This core was embedded in a larger readout system and it was used during beam tests and in the laboratory to demonstrate the capabilities of a time-resolved readout system for compact RICH detectors.
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