Abstract
This paper presents the circuit design and application of a monolithically integrated silicon radio-frequency power amplifier for 0.8-1 GHz. The chip is fabricated in a 25-GHz-f/sub T/ silicon bipolar production technology (Siemens B6HF). A maximum output power of 5 W and maximum efficiency of 59% is achieved. The chip is operating from 2.5 to 4.5 V. The linear gain is 36 dB. The balanced two-stage circuit design is based fundamentally on three on-chip transformers. The driver stage and the output stage are connected in common-emitter configuration. The input signal can be applied balanced or single-ended if one input terminal is grounded. One transformer at the input acts as balun as well as input matching network. Two transformers acts as interstage matching network.
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