Abstract

A fully integrated Sigma-delta fractional-N frequency synthesizer is realized in TSMC 0.18 μm MM/RF 1P6M Salicide 1.8V/3.3V technology. The proposed implicit dual-path loop filter with enhanced trans-conductor can eliminate the charge pump mismatch of the conventional dual-path loop filter and suppress the effect of parasitic poles and zero as well as reduce the area of the loop filter. A simple frequency divider based on phase switching technique is employed to reduce the area and power dissipation. The frequency synthesizer consumes 21 MW power from 1.8 V power supply voltage with area 1.80 × 2.0 mm2. The achieved phase noise is ?82 dBc/Hz at 10 kHz offset, ?108 dBc/Hz at 100 kHz offset and ?128 dBc/Hz at 1 MHz offset respectively with frequency switching time 95 μs.

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